74LS245 Datasheet | National Semiconductor

54LS245 DM54LS245 DM74LS245 TRI-STATE Octal Bus Transceiver June 1989 54LS245 DM54LS245 DM74LS245 TRI-STATE Octal Bus Transceiver General Description These octal bus transceivers are designed for asynchronous two-way munication between data buses The control function implementation minimizes external timing requirements The device allows data transmission from the A bus to the B bus or from the B bus to the A bus depending upon the logic level at the direction control (DIR) input The enable input (G) can be used to disable the device so that the buses are effectively isolated Y Y Y Y Y Y Features Y Y Y Bi-Directional bus transceiver in a high-density 20-pin package TRI-STATE outputs drive bus lines directly PNP inputs reduce DC loading on bus lines Hysteresis at bus inputs improve noise margins Typical propagation delay times port-to-port 8 ns Typical enable disable times 17 ns IOL (sink current) 54LS 12 mA 74LS 24 mA IOH (source current) b 12 mA 54LS b 15 mA 74LS Alternate Military Aerospace device (54LS245) is available Contact a National Semiconductor Sales Office Distributor for specifications Connection Diagram Dual-In-Line Package TL F 6413 - 1 Order Number 54LS245DMQB 54LS245FMQB 54LS245LMQB DM54LS245J DM54LS245W DM74LS245WM or DM74LS245N See NS Package Number E20A J20A M20B N20A or W20A Function Table Enable G L L H Direction Control DIR L H X Operation B data to A bus A data to B bus Isolation H e High Level L e Low Level X e Irrelevant TRI-STATE is a registered trademark of National Semiconductor Corporation C1995 National Semiconductor Corporation TL F 6413 RRD-B30M105 Printed in U S...