GENERAL DESCRIPTION
An input sample/hold is implemented by a capacitive reference ladder and sampled-data comparator. This allows the analog input to vary during the A/D conversion cycle. In the differential mode, valid outputs are obtained even when the negative inputs are greater than the positive because of the 10-bit plus sign output data format. The serial I/O is configured to comply with the NSC MICROWIRE™ serial data exchange standard for easy interface to the COPS™ and HPC™ families of controllers, and can easily interface with standard shift registers and microprocessors. n n n n n n n Software or hardware power down Analog input sample/hold function Ratiometric or absolute voltage referencing No zero or full scale adjustment required No missing codes over temperature TTL/CMOS input/output compatible Standard DIP and SO packages Key Specifications n n n n n n n Resolution Single supply Power dissipation In powerdown mode Conversion time Sampling rate Band-gap reference 10 bits...
National Semiconductor
