ADC12C170 Overview
Features The ADC12C170 is a high-performance CMOS analog-to 1.1 GHz Full Power Bandwidth digital converter capable of converting analog input signals Internal sample-and-hold circuit into 12-Bit digital words at rates up to 170 Mega Samples Per Low power consumption Second (MSPS). This converter uses a differential, pipelined Internal precision 1.0V reference architecture with digital error correction and an on-chip...
ADC12C170 Key Features
- Low power consumption Second (MSPS). This converter uses a differential, pipelined
- Internal precision 1.0V reference architecture with digital error correction and an on-chip sam- Single-ended or Differe
- Clock Duty Cycle Stabilizer performance. A unique sample-and-hold stage yields a full- Dual +3.3V and +1.8V supply opera
- Power-down and Sleep modes dual +3.3V and +1.8V power supplies and consumes 715 mW
- Offset binary or 2's plement output data format of power at 170 MSPS
- Resolution has a faster wake-up time. 170 MSPS
- Conversion Rate The differential inputs provide a full scale differential input 67.2 dBFS (typ)
- SNR (fIN = 70 MHz) swing equal to 2 times the reference voltage. A stable 1.0V 85.4 dBFS (typ)
- SFDR (fIN = 70 MHz) internal voltage reference is provided, or the ADC12C170 can ENOB (fIN = 70 MHz) 10.8 bits (typ)
- be operated with an external reference. .. 1.1 GHz (typ)
