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ADC12QS065 - Quad 12-Bit 65 MSPS A/D Converter

Description

This is Preliminary Information for a product currently in development.

ALL specifications are design targets and are subject to change.

The ADC12QS065 is a low power, high performance CMOS 4-channel analog-to-digital converter with LVDS serialized outputs.

Features

  • n n n n n n n n Single +3.0V supply operation Internal sample-and-hold Internal reference Low power consumption Power down mode Clock and Data Frame Timing 780 Mbps serial LVDS data rate (at 65 MHz clock) LVDS serial output rated for 100 Ohm load Key Specifications n n n n n n n n Resolution DNL SNR (fIN = 10 MHz) SFDR (fIN = 10 MHz) ENOB (at Nyquist) Power Consumption -- Operating, 65 MSPS, per ADC -- Power Down Mode 12 Bits ± 0.3 LSB (typ) 68.5 dB (typ) 85 dB (typ) 11 Bits (typ) 200 mW (typ).

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Datasheet Details

Part number ADC12QS065
Manufacturer National Semiconductor
File Size 725.09 KB
Description Quad 12-Bit 65 MSPS A/D Converter
Datasheet download datasheet ADC12QS065 Datasheet
Additional preview pages of the ADC12QS065 datasheet.

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Full PDF Text Transcription

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PRELIMINARY www.DataSheet4U.com November 2005 ADC12QS065 Quad 12-Bit 65 MSPS A/D Converter with LVDS Serialized Outputs ADC12QS065 Quad 12-Bit 65 MSPS A/D Converter with LVDS Serialized Outputs General Description This is Preliminary Information for a product currently in development. ALL specifications are design targets and are subject to change. The ADC12QS065 is a low power, high performance CMOS 4-channel analog-to-digital converter with LVDS serialized outputs. The ADC12QS065 digitizes signals to 12 bits resolution at sampling rates up to 65 MSPS while consuming a typical 200 mW/ADC from a single 3.0V supply. Sampled data is transformed into high speed serial LVDS output data streams. Clock and frame LVDS pairs aid in data capture.
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