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ADC14DS095 - A/D Converter

This page provides the datasheet information for the ADC14DS095, a member of the ADC14DS065 A/D Converter family.

Datasheet Summary

Description

NOTE: This is Advance Information for products currently in development.

ALL specifications are design targets and are subject to change.

Features

  • 1 GHz Full Power Bandwidth Internal sample-and-hold circuit and precision reference Low power consumption Clock Duty Cycle Stabilizer Single +3.3V supply operation Offset binary or 2's complement output data format Serial LVDS Outputs 60-pin LLP package, (9x9x0.8mm, 0.5mm pin-pitch) Key Specifications.
  • For ADC14DS105 Resolution Conversion Rate SNR (fIN = 240 MHz) SFDR (fIN = 240 MHz) Full Power Bandwidth Po.

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Full PDF Text Transcription

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ADC14DS065/ADC14DS080/ADC14DS095/ADC14DS105 Dual 14-Bit A/D Converter ADVANCE INFORMATION February 2007 ADC14DS065/ADC14DS080/ADC14DS095/ADC14DS105 Dual 14-Bit, 65/80/95/105 MSPS A/D Converter with Serial LVDS Outputs General Description NOTE: This is Advance Information for products currently in development. ALL specifications are design targets and are subject to change. The ADC14DS065, ADC14DS080, ADC14DS095, and ADC14DS105 are high-performance CMOS analog-to-digital converters capable of converting two analog input signals into 14-bit digital words at rates up to 65/80/95/105 Mega Samples Per Second (MSPS) respectively. The digital outputs are serialized and provided on differential LVDS signal pairs.
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