CD4028BM Datasheet | National Semiconductor

CD4028BM CD4028BC BCD-to-Decimal Decoder February 1988 CD4028BM CD4028BC BCD-to-Decimal Decoder General Description The CD4028BM CD4028BC is a BCD-to-decimal or binaryto-octal decoder consisting of 4 inputs decoding logic gates and 10 output buffers A BCD code applied to the 4 inputs A B C and D results in a high level at the selected 1-of-10 decimal decoded outputs Similarly a 3-bit binary code applied to inputs A B and C is decoded in octal at outputs 0 - 7 A high level signal at the D input inhibits octal decoding and causes outputs 0- 7 to go low All inputs are protected against static discharge damage by diode clamps to VDD and VSS Features Wide supply voltage range 3 0V to 15V High noise immunity 0 45 VDD (typ ) Low power TTL fan out of 2 driving 74L patibility or 1 driving 74LS Low power Glitch free outputs ‘‘Positive logic’’ on inputs and outputs Applications Code conversion Address decoding Indicator-tube decoder Logic and Connection Diagrams Dual-In-Line Package TL F 5959 - 2 Top View Order Number CD4028B TL F 5959 - 1 Truth Table D C B A 0 1 2 3 4 5 6 7 8 9 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 C1995 National Semiconductor Corporation TL F 5959 1 e High Level 0 e Low Level 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0...