Description
The CD4035B 4-bit parallel-in parallel-out shift register is a monolithic complementary MOS (CMOS) integrated circuit constructed with P- and N-channel enhancement mode transistors This shift register is a 4-stage clocked serial register having provisions for synchronous parallel inputs to each stag
Features
- Y Y Y
Y Y Y Y Y Y Y Y Y
Wide supply voltage range 3 0V to 15V High noise immunity 0 45 VDD (typ ) Low power TTL Fan out of 2 driving 74L compatibility or 1 driving 74LS 4-stage clocked operation Synchronous parallel entry on all 4 stages JK inputs on first stage Asynchronous true complement control on all outputs Reset control Static flip-flop operation master slave configuration Buffered outputs Low power dissipation 5 mW (typ ) (ceramic) High speed to 5 MHz.
CD4035BC Datasheet
