Description
The CD4042BM CD4042BC quad clocked ‘‘D’’ latch is a monolithic complementary MOS (CMOS) integrated circuit constructed with P- and N-channel enhancement mode transistors The outputs Q and Q either latch or follow the data input depending on the clock level which is programmed by the polarity input F
Features
- Y Y Y
Y Y Y
Wide supply voltage range High noise immunity Low power TTL compatibility Clock polarity control Fully buffered data inputs Q and Q outputs
3 0V to 15V 0 45 VDD (typ ) Fan out of 2 driving 74L or 1 driving 74LS
Connection Diagram
Dual-In-Line Package
Truth Table
Clock 0 L 1 K Polarity 0 0 1 1 Q D Latch D Latch
Order Number CD4042B
TL F 5966.
- 1
Top View
Logic Diagrams
TL F 5966.
- 2 TL F 5966.
- 3
TL F 5966.
- 4
C1995 National Semiconductor Co.
CD4042BC Datasheet
