CGS64C800 - Low Skew PLL 1-to-8 CMOS Clock Driver

Product Overview

National Semiconductor

Datasheet Details

Part number	CGS64C800
Manufacturer	National Semiconductor
File Size	402.18 KB
Description	Low Skew PLL 1-to-8 CMOS Clock Driver
Datasheet	CGS64C800 Datasheet
Additional preview pages of the CGS64C800 datasheet.

Product details

Description

Q ,!') These minimum skew clock drivers are designed for Clock Generation and Support (CGS) applications operating at high frequencies utilizing a phase lock loop.The phase lock loop allows for outputs to lock-on to either SyncLO or SyncL1 inputs, which could be operating at different frequencies.This product is ideal for applications requiring clock synchronization and distribution of either on or off board components.The PLL uses a counter and a digital to analog convertor for its charge

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Published: Jan 12, 2025 |