Datasheet Summary
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PRELIMINARY
CGS64/7482529 550 ps 1 to 10 Minimum Skew Clock Driver
General Description
This minimum skew clock driver is designed for Clock Gen- eration and Support (CGS) applications operating from 33 MHz to 80 MHz. The devices guarantee minimum output skew across the outputs of a given device.
Skew parameters are also provided as a means to measure duty cycle requirements as those found in high speed clock- ing systems. The '2529 is a minimum skew clock driver with two selectable inputs driving ten outputs
The SEL pin is used to determine which CKn will have an active effect on the outputs of the circuit. When SEL = 1, the CK1 input is selected and when SEL =...