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CLC001 - Serial Digital Cable Driver with Adjustable Outputs

General Description

The CLC001 is a monolithic, high-speed cable driver designed for use in SMPTE 259M serial digital video and ITU-T G.703 serial digital data transmission applications.

The CLC001 drives 75Ω transmission lines (Belden 8281 or equivalent) at data rates up to 622 Mbps.

Key Features

  • n n n n n Adjustable output amplitude Differential input and output Accepts LVPECL or LVDS input swings Low power dissipation Single +3.3V supply Connection Diagram (8-Pin SOIC) DS101329-2 Order Number CLC001AJE See NS Package Number M08A Typical.

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📁 Similar Datasheet

Part Number Description Manufacturer
CLC001 CLC001 Serial Digital Cable Driver with Adjustable Outputs (Rev. B) ETCTI
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CLC020 CLC020 SMPTE 259M Digital Video Serializer with Integrated Cable Driver (Rev. E) ETCTI
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Other Datasheets by National Semiconductor (now Texas Instruments)

Part Number Description
CLC002 SMPTE 292M / 259M Serial Digital Cable Driver
CLC005 ITU-T G.703 Cable Driver with Adjustable Outputs
CLC006 Serial Digital Cable Driver with Adjustable Outputs
CLC007 Serial Digital Cable Driver with Dual Complementary Outputs
CLC011 Serial Digital Video Decoder

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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CLC001 Serial Digital Cable Driver with Adjustable Outputs March 2001 CLC001 Serial Digital Cable Driver with Adjustable Outputs General Description The CLC001 is a monolithic, high-speed cable driver designed for use in SMPTE 259M serial digital video and ITU-T G.703 serial digital data transmission applications. The CLC001 drives 75Ω transmission lines (Belden 8281 or equivalent) at data rates up to 622 Mbps. Controlled output rise and fall times (400 ps typical) minimize transitioninduced jitter. The output voltage swing is adjustable from 800 mVp-p to 1.0 Vp-p using an external resistor. The CLC001’s output stage consumes less power than other designs. The differential inputs accept LVDS signal levels, LVPECL levels directly or PECL with attenuation networks.