| Part number | DM54LS109A |
|---|---|
| Manufacturer | National Semiconductor |
| File Size | 135.00 KB |
| Description | Dual Positive-Edge-Triggered J-K Flip-Flops with Preset/ Clear/ and Complementary Outputs |
| Datasheet |
 DM54LS109A Datasheet
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This device contains two independent positive-edge-triggered J-K flip-flops with complementary outputs The J and K data is accepted by the flip-flop on the rising edge of the clock pulse The triggering occurs at a voltage level and is not directly related to the transition time of the rising edge of the clock The data on the J and K inputs may be changed while the clock is high or low as long as setup and hold times are not violated A low logic level on the preset or clear inputs will set or res
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