Datasheet4U Logo Datasheet4U.com

DM54LS191 - Synchronous 4-Bit Up/Down Counters

This page provides the datasheet information for the DM54LS191, a member of the DM54LS190 Synchronous 4-Bit Up/Down Counters family.

Description

These circuits are synchronous reversible up down counters The LS191 is a 4-bit binary counter and the LS190 is a BCD counter Synchronous operation is provided by having all flip-flops clocked simultaneously so that the outputs change simultaneously when so instructed by the steering logic This mode

Features

  • Y Counts 8-4-2-1 BCD or binary Y Single down up count control line Y Count enable control input Y Ripple clock output for cascading Y Asynchronously presettable with load control Y Parallel outputs Y Cascadable for n-bit.

📥 Download Datasheet

Datasheet preview – DM54LS191

Datasheet Details

Part number DM54LS191
Manufacturer National Semiconductor
File Size 125.07 KB
Description Synchronous 4-Bit Up/Down Counters
Datasheet download datasheet DM54LS191 Datasheet
Additional preview pages of the DM54LS191 datasheet.

📁 Similar Datasheet

  • DM54LS47 - BCD/7-Segment Decoder/Driver (MSI)
  • DM54LS48 - BCD/7-Segment Decoder/Driver (MSI)
  • DM54LS49 - BCD/7-Segment Decoder/Driver (MSI)
  • DM54L89A - 64-BIT READ/WRITE MEMORIES (ETC)
  • DM54141 - BCD / DECIMAL DECODERS / DRIVERS (MSI)
  • DM54155 - Dual 2-Line to 4-Line Decoders/Demultiplexers (ETC)
  • DM5441A - BCD / DECIMAL DECODERS / DRIVERS (MSI)
  • DM5446A - BCD/7-Segment Decoder/Driver (MSI)
  • DM5447A - BCD/7-Segment Decoder/Driver (MSI)
  • DM5448 - BCD/7-Segment Decoder/Driver (MSI)
Other Datasheets by National Semiconductor
  • DM54LS190 - Synchronous 4-Bit Up/Down Counters
  • DM54LS10 - Triple 3-Input NAND Gates
  • DM54LS109A - Dual Positive-Edge-Triggered J-K Flip-Flops with Preset/ Clear/ and Complementary Outputs
  • DM54LS11 - Triple 3-Input AND Gates
  • DM54LS112A - NEGATIVE-EDGE-TRIGERED MASTER-SLAVE J-K FLIP-FLOPS
  • DM54LS125A - Quad TRI-STATE Buffers
  • DM54LS132 - NAND Gates
  • DM54LS138 - Decoders/Demultiplexers

Full PDF Text Transcription

Click to expand full text
DM54LS190 DM74LS190 DM54LS191 DM74LS191 Synchronous 4-Bit Up Down Counters with Mode Control May 1989 DM54LS190 DM74LS190 DM54LS191 DM74LS191 Synchronous 4-Bit Up Down Counters with Mode Control General Description These circuits are synchronous reversible up down counters The LS191 is a 4-bit binary counter and the LS190 is a BCD counter Synchronous operation is provided by having all flip-flops clocked simultaneously so that the outputs change simultaneously when so instructed by the steering logic This mode of operation eliminates the output counting spikes normally associated with asynchronous (ripple clock) counters The outputs of the four master-slave flip-flops are triggered on a low-to-high level transition of the clock input if the enable input is low A high at the enable input
Published: |