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DM54LS368A - Hex TRI-STATE Inverting Buffers

This page provides the datasheet information for the DM54LS368A, a member of the DM54LS368AJ Hex TRI-STATE Inverting Buffers family.

Description

This device contains six independent gates each of which performs an inverting buffer function The outputs have the TRI-STATE feature When enabled the outputs exhibit the low impedance characteristics of a standard LS output with additional drive capability to permit the driving of bus lines without

Features

  • Y Alternate Military Aerospace device (54LS368) is available Contact a National Semiconductor Sales Office Distributor for specifications Connection Diagram Dual-In-Line Package TL F 6430.
  • 1 Order Number 54LS368ADMQB 54LS368AFMQB 54LS368ALMQB DM54LS368AJ DM54LS368AW DM74LS368AM or DM74LS368AN See NS Package Number E20A J16A M16A N16E or W16A Function Table YeA Inputs Output AG Y LL HL XH H L Hi-Z H e High Logic Level L e Low Logic Level X e Either Low or High Logic Level Hi-.

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Datasheet Details

Part number DM54LS368A
Manufacturer National Semiconductor
File Size 137.45 KB
Description Hex TRI-STATE Inverting Buffers
Datasheet download datasheet DM54LS368A Datasheet
Additional preview pages of the DM54LS368A datasheet.

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54LS368A DM54LS368A DM74LS368A Hex TRI-STATE Inverting Buffers May 1989 54LS368A DM54LS368A DM74LS368A Hex TRI-STATE Inverting Buffers General Description This device contains six independent gates each of which performs an inverting buffer function The outputs have the TRI-STATE feature When enabled the outputs exhibit the low impedance characteristics of a standard LS output with additional drive capability to permit the driving of bus lines without external resistors When disabled both the output transistors are turned off presenting a high-impedance state to the bus line Thus the output will act neither as a significant load nor as a driver To minimize the possibility that two outputs will attempt to take a common bus to opposite logic levels the disable time is shorter than the en
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