| Part number | DM54LS73A |
|---|---|
| Datasheet | DM54LS73A_NationalSemiconductor.pdf |
| File Size | 139.87 KB |
| Manufacturer | National Semiconductor (now Texas Instruments) |
| Description | Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops |
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This device contains two independent negative-edge-triggered J-K flip-flops with plementary outputs The J and K data is processed by the flip-flops on the falling edge of the clock pulse The clock triggering occurs at a voltage level and is not directly related to the transition time of the negative going edge of the clock pulse The data on the J and K inputs is allowed to change while the clock is high or low...
See all National Semiconductor (now Texas Instruments) datasheets
| Part Number | Description |
|---|---|
| DM54LS74A | Dual Positive-Edge-Triggered D Flip-Flops |
| DM54LS00 | Quad 2-Input NAND Gates |
| DM54LS02 | Quad 2-Input NOR Gates |
| DM54LS03 | Quad 2-Input NAND Gates with Open-Collector Outputs |
| DM54LS04 | Hex Inverting Gates |
| DM54LS08 | Quad 2-Input AND Gates |
| DM54LS10 | Triple 3-Input NAND Gates |
| DM54LS109A | Dual Positive-Edge-Triggered J-K Flip-Flops with Preset/ Clear/ and Complementary Outputs |
| DM54LS11 | Triple 3-Input AND Gates |
| DM54LS112A | NEGATIVE-EDGE-TRIGERED MASTER-SLAVE J-K FLIP-FLOPS |
