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DM74125 - Quad TRI-STATE Buffers

General Description

This device contains four independent gates each of which performs a non-inverting buffer function The outputs have the TRI-STATE feature When enabled the outputs exhibit the low impedance characteristics of a standard TTL output with additional drive capability at the high Logic level to permit the

Key Features

  • Y Alternate Military Aerospace device (54125) is available Contact a National Semiconductor Sales Office Distributor for specifications Connection Diagram Dual-In-Line Package TL F 6540.
  • 1 Order Number 54125DMQB 54125FMQB DM54125J DM54125W or DM74125N See NS Package Number J14A N14A or W14B Function Table YeA Inputs A L H X C L L H Output Y L H Hi-Z H e High Logic Level L e Low Logic Level X e Either Low or High Logic Level Hi-Z e TRI-STATE (Outputs are disabled) TRI-STATE is a r.

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54125 DM54125 DM74125 Quad TRI-STATE Buffers June 1989 54125 DM54125 DM74125 Quad TRI-STATE Buffers General Description This device contains four independent gates each of which performs a non-inverting buffer function The outputs have the TRI-STATE feature When enabled the outputs exhibit the low impedance characteristics of a standard TTL output with additional drive capability at the high Logic level to permit the driving of bus lines without external pull-up resistors When disabled both the output transistors are turned off presenting a high-impedance state to the bus line Thus the output will act neither as a significant load nor as a driver To minimize the possibility that two outputs will attempt to take a common bus to opposite logic levels the disable time is shorter than the en