This device contains two independent gates each of which perform the logic NAND function
Connection Diagrams
Dual-In-Line Package
TL F 10171
1
Order Number DM74LS40M or DM74LS40N See NS Package Number M14A or N14A
Function Table
(Each Gate) Inputs A H L X X X B H X L X X C H X X L X D
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DM74LS40 Dual 4-Input NAND Buffer
February 1992
DM74LS40 Dual 4-Input NAND Buffer
General Description
This device contains two independent gates each of which perform the logic NAND function
Connection Diagrams
Dual-In-Line Package
TL F 10171 – 1
Order Number DM74LS40M or DM74LS40N See NS Package Number M14A or N14A
Function Table
(Each Gate) Inputs A H L X X X B H X L X X C H X X L X D H X X X L Outputs Y L H H H H
Logic Diagram (Each Gate)
TL F 10171 – 2
Positive Logic Y e A B C D or Y e A a B a C a D
C1995 National Semiconductor Corporation
TL F 10171
RRD-B30M105 Printed in U S A
Absolute Maximum Ratings (Note)
Supply Voltage Input Voltage Operating Free Air Temperature Range DM74LS Storage Temperature Range 7V 7V 0 C to a 70 C
b 65 C to a 150 C
Note The ‘‘Absolute M
DM74LS40 Datasheet
