DM74LS85 Datasheet (PDF) Download
National Semiconductor
DM74LS85

Description

These 4-bit magnitude parators perform parison of straight binary or BCD codes Three fully-decoded decisions about two 4-bit words (A B) are made and are externally available at three outputs These devices are fully expandable to any number of bits without external gates Words of greater length may be pared by connecting parators in cascade The A l B A k B and A e B outputs of a stage handling less-significant bits are connected to the corresponding inputs of the next stage handling more-significant bits The stage handling the least-significant bits must have a high-level voltage applied to the A e B input The cascading path is implemented with only a two-gate-level delay to reduce overall parison times for long words.