DM74LS90 Datasheet PDF | National Semiconductor

National Semiconductor DM74LS90

the DM74LS90 also has gated set-to-nine inputs for use in BCD nine’s complement applications. The input count pulses are applied to input A and the outputs are as described in the appropriate truth table. A symmetrical divide-by-ten count can be obtained from the DM74LS90 counters by connecting the QD output to the A input and applying the input count to the B input which gives a divide-by-ten square wave at output QA.

Part No.	DM74LS90
Datasheet	DM74LS90 Download
Manufacturer	National Semiconductor
Description	Decade and Binary Counters
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GENERAL DESCRIPTION

Each of these monolithic counters contains four masterslave flip-flops and additional gating to provide a divide-bytwo counter and a three-stage binary counter for which the count cycle length is divide-by-five for the DM74LS90. All of these counters have a gated zero reset and To use their maximum count length (decade or four bit binary), the B input is connected to the QA output.

FEATURES

s Typical power dissipation 45 mW s Count frequency 42 MHz Ordering Code: Order Number DM74LS90M DM74LS90N Package Number M14A N14A Package

DESCRIPTION

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Reset/Count Truth Table Reset Inputs R0(1) H H X X L L X R0(2) H H X L X X L R9(1) L X H X L X L R9(2) X L H L X L X QD L L H Output QC L L L QB L L L QA L L H COU...

DM74LS90 Datasheets by Manufacturer

1 datasheets

Part Number	Manufacturer
DM74LS90	Fairchild Semiconductor