Description
The DP83231 CRD device is a clock recovery device that has been designed for use in 100 Mbps FDDI (Fiber Distributed Data Interface) networks The device receives serial data from a Fiber Optic Receiver in differential ECL NRZI 4B 5B group code format and outputs resynchronized NRZI received data and
Features
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Clock recovery at 100 Mbps data rate Internal 250 MHz VCO 0 1% VCO operating range Crystal controlled Precision window centering delay line Single a 5V supply 28-pin PLCC package BiCMOS processing
TL F 10384.
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FIGURE 1-1 FDDI Chip Set Block Diagram
TRI-STATE is a registered trademark of National Semiconductor Corporation BSITM BMACTM.
DP83231 Datasheet
