Description
The DP83256 56-AP 57 Enhanced Physical Layer Controller (PLAYER a device) implements one complete Physical Layer (PHY) entity as defined by the Fiber Distributed Data Interface (FDDI) ANSI X3T9 5 standard The PLAYER a device integrates state of the art digital clock recovery and improved clock gener
Features
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Single chip FDDI Physical Layer (PHY) solution Integrated Digital Clock Recovery Module provides enhanced tracking and greater lock acquisition range Integrated Clock Generation Module provides all necessary clock signals for an FDDI system from an external 12 5 MHz reference
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Alternate PMD Interface (DP83256-AP 57) supports UTP twisted pair FDDI PMDs with no external clock recovery or clock generation functions required No External Filter Components Connection Management (.
DP83256 Datasheet
