DP83952 Datasheet | National Semiconductor

Features (RIC II) PRELIMINARY September 1995 DP83952 Repeater Interface Controller with Security Features (RIC TM II) General Description The DP83952 RIC II Repeater Interface Controller is an ‘‘Enhanced’’ version of the DP83950 RIC RIC II is fully backward pin and functional patible with the RIC The DP83952 RIC II has the same basic architecture as the RIC with additional feature enhancements RIC II provides additional network security options additional statistics for repeater activities and a faster processor interface When RIC II is used in a ‘‘non-secure’’ mode it functions in the same manner as the DP83950 RIC When RIC II is used in a ‘‘secure’’ mode it restricts unauthorized nodes from intruding and or eavesdropping into the network The RIC II utilizes internal CAMs to store pare addresses of valid nodes when network security is desired RIC II implements the IEEE 802 3 multiport repeater unit specifications It is fully pliant with the 802 3 repeater specification for the repeater segment partition and jabber lockup protection state machines (Continued) Separate Partition state machines for each port patible with 802 3k Hub Management requirements Provides port status information for LED displays including receive collision partition link status and jabber Power-up configuration options Repeater and Partition Specifications Transceiver Interface Status Display Processor Operations Simple processor interface for repeater management and port disable On-chip Event Counters and Event Flag Arrays Serial Management Bus Interface to bine packet and repeater status information CMOS process for low power dissipation Single 5V supply Security Features Features Y Y Y Y Y Y pliant with the IEEE 802 3 Repeater Specification Y 13 network connections (ports) per chip Y Selectable on-chip twisted-pair transceivers Cascadable for large hub applications . patible with AUI pliant transceivers On-chip Elasticity Buffer Manchester encoder and...