National Semiconductor DS26LS33C
The DS26LS32 and DS26LS32A are quad differential line receivers designed to meet the RS-422 RS-423 and Federal Standards 1020 and 1030 for balanced and unbalanced digital data transmission The DS26LS32 and DS26LS32A have an input sensitivity of 200 mV over the input voltage range of g 7V and the DS26LS33 and DS26LS33A have an input sensitivity of 500 mV over the input voltage range of g 15V Both the DS26LS32A and DS26LS33A differ in function from the popular DS26LS32 and DS26LS33 in that input pull-up and pull-down resistors are included which prevent output oscillation on unused channels...GENERAL DESCRIPTION
The DS26LS32 and DS26LS32A are quad differential line receivers designed to meet the RS-422 RS-423 and Federal Standards 1020 and 1030 for balanced and unbalanced digital data transmission The DS26LS32 and DS26LS32A have an input sensitivity of 200 mV over the input voltage range of g 7V and the DS26LS33 and DS26LS33A have an input sensitivity of 500 mV over the input voltage range of g 15V Both the DS26LS32A and DS26LS33A differ in function from the popular DS26LS32 and DS26LS33 in that input pull-up and pull-down resistors are included which prevent output oscillation on unused channels Each version provides an enable and disable function common to all four receivers and features TRI-STATE outputs with 8 mA sink capability Constructed using low power Schottky processing these devices are available over the full military and commerical operating temperature rangesFEATURES
Y Y Y Y Y Y Logic Diagram r e .n a ww 0 TL F 5255–2 TL F 5255 ua ENABLE HI-Z e TRI-STATE t e n Truth Table 1 See Note Below Connection Diagram F w C Dual-In-Line Package Top View ce.