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DS32ELX0124 - Deserializer

Download the DS32ELX0124 datasheet PDF. This datasheet also covers the DS32EL0124 variant, as both devices belong to the same deserializer family and are provided as variant models within a single manufacturer datasheet.

General Description

The DS32EL0124/DS32ELX0124 integrates clock and data recovery modules for high-speed serial communication over FR-4 printed circuit board backplanes, balanced cables, and optical fiber.

Key Features

  • 5-bit LVDS parallel data interface Programmable Receive Equalization Selectable DC-balance decoder Selectable De-scrambler Remote Sense for automatic detection and negotiation of link status No external receiver reference clock required LVDS parallel interface Programmable LVDS output clock delay Supports output data-valid signaling Supports keep-alive clock output On chip LC VCOs Redundant seri.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (DS32EL0124_NationalSemiconductor.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

Part Number Description Manufacturer
DS32ELX0124 FPGA-Link Deserializer Texas Instruments
DS32ELX0421 FPGA-Link Serializer Texas Instruments
DS32EL0124 FPGA-Link Deserializer Texas Instruments
DS32EL0421 FPGA-Link Serializer Texas Instruments
DS32EV100 Programmable Single Equalizer Texas Instruments

Other Datasheets by National Semiconductor (now Texas Instruments)

Part Number Description
DS32ELX0421 Serializer
DS32EL0124 Deserializer
DS32EL0421 Serializer
DS32EV100 Programmable Single Equalizer
DS32EV400 Programmable Single Equalizer

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
DS32EL0124/DS32ELX0124 125 — 312.5 MHz Deserializer with DDR LVDS Parallel Interface PRELIMINARY May 9, 2008 DS32EL0124 DS32ELX0124 125 MHz — 312.5 MHz Deserializer with DDR LVDS Parallel Interface General Description The DS32EL0124/DS32ELX0124 integrates clock and data recovery modules for high-speed serial communication over FR-4 printed circuit board backplanes, balanced cables, and optical fiber. This easy-to-use chipset integrates advanced signal and clock conditioning functions, with an FPGA friendly www.DataSheet4U.com interface. The DS32EL0124/DS32ELX0124 deserializes up to 3.125 Gbps of high speed serial data to 5 LVDS outputs without the need for an external reference clock. With DC-balance decoding enabled, the application payload of 2.5 Gbps is deserialized to 4 LVDS outputs.