Datasheet4U Logo Datasheet4U.com

DS3487 - Quad TRI-STATE Line Driver

General Description

National’s quad RS-422 driver

Key Features

  • four independent drivers which comply with EIA Standards for the electrical characteristics of balanced voltage digital interface circuits. The outputs are TRI-STATE structures which are forced to a high impedance state when the appropriate output control pin reaches a logic zero condition. All input pins are PNP buffered to minimize input loading for either logic one or logic zero inputs. Features n n n n n n n Four independent drivers TRI-STATE ® outputs Fast propagation times (typ 10 ns) TTL.

📥 Download Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
DS3486 Line Receiver Texas Instruments
DS3486M Line Receiver Texas Instruments
DS3486MX Line Receiver Texas Instruments
DS3400 5-Port Pilot Solenoid Valve Body Ported Type / Base Ported Type TPC
DS3430 5-Port Pilot Solenoid Valve Body Ported Type / Base Ported Type TPC

Other Datasheets by National Semiconductor (now Texas Instruments)

Part Number Description
DS3486 Quad RS-422/ RS-423 Line Receiver
DS34C86T Quad CMOS Differential Line Receiver
DS34C87T CMOS Quad TRISTATE Differential Line Driver
DS34F86 (DS34F86 / DS35F86) RS-422/RS-423 Quad Line Receiver
DS34LV86T 3V Enhanced CMOS Quad Differential Line Receiver

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
DS3487 Quad TRI-STATE Line Driver May 1998 DS3487 Quad TRI-STATE ® Line Driver General Description National’s quad RS-422 driver features four independent drivers which comply with EIA Standards for the electrical characteristics of balanced voltage digital interface circuits. The outputs are TRI-STATE structures which are forced to a high impedance state when the appropriate output control pin reaches a logic zero condition. All input pins are PNP buffered to minimize input loading for either logic one or logic zero inputs.