DS34F86
Description
The DS34F86/DS35F86 RS-422/3 Quad Receiver features four independent receivers, which ply with EIA Standards for the electrical characteristics of balanced/ unbalanced voltage digital interface circuits. Receiver outputs are 74LS patible TRI-STATE structures which are forced to a high impedance state when the appropriate output control lead reaches a logic zero condition. A PNP device buffers each output control lead to assure minimum loading for either logic one or logic zero inputs. In addition each receiver has internal hysteresis circuitry to improve noise margin and discourage output instability for slowly changing input waveforms. The DS34F86/DS35F86 offers improved performance due to the use of state-of-the-art L-FAST bipolar technology. The L-FAST technology allows for higher speeds and lower currents by utilizing extremely short gate delay times. Thus, the DS34F86/DS35F86 features lower power, extended temperature range, and improved specifications. The...
