DS88LS120 Datasheet | National Semiconductor

.Data Sheet.co.kr DS78LS120 DS88LS120 Dual Differential Line Receiver (Noise Filtering and Fail-Safe) February 1996 DS78LS120 DS88LS120 Dual Differential Line Receiver (Noise Filtering and Fail-Safe) General Description The DS78LS120 and DS88LS120 are high performance dual differential TTL patible line receivers for both balanced and unbalanced digital data transmission The inputs are patible with EIA Federal and MIL standards The line receiver will discriminate a g 200 m V input signal over a mon-mode range of g 10V and a g 300 m V signal over a range of g 15V Circuit Features include hysteresis and response control for applications where controlled rise and fall times and or high frequency noise rejection are desirable Threshold offset control is provided for fail-safe detection should the input be open or short Each receiver includes an optional 180X terminating resistor and the output gate contains a logic strobe for time discrimination The DS78LS120 is specified over a b55 C to a 125 C temperature range and the DS88LS120 from 0 C to a 70 C Input specifications meet or exceed those of the popular DS7820 DS8820 line receiver Features Y Y Y Y Y Y Meets EIA standards RS232-C RS422 and RS423 Federal Standards 1020 1030 and MIL-188-114 Input voltage range of g 15V (differential or monmode) Separate strobe input for each receiver 5k typical input impedance Optional 180X termination resistor 50 m V input hysteresis 200 m V input threshold Separate fail-safe mode Connection Diagram Dual-In-Line Package TL F 7499 - 1 Top View Order Number DS88LS120N or DS88LS120M See NS Package Number M16A or N16A For plete Military 883 Specifications see RETS Data Sheet Order Number DS78LS120J 883 or DS78LS120W 883 See NS Package Number J16A or W16A C1996 National Semiconductor Corporation TL F 7499 RRD-B30M36 Printed in U S A http national Datasheet pdf - http://..net/ .Data...