DS90LV028A Datasheet PDF - National Semiconductor 3V LVDS Dual CMOS Differential Line Receiver Specs

DS90LV028A - 3V LVDS Dual CMOS Differential Line Receiver

Datasheet Summary

Description

The DS90LV028A is a dual CMOS differential line receiver designed for applications requiring ultra low power dissipation, low noise and high data rates.

The device is designed to support data rates in excess of 400 Mbps (200 MHz) utilizing Low Voltage Differential Signaling (LVDS) technology.

Features

n n n n n n n n n n n n n n > 400 Mbps (200 MHz) switching rates 50 ps differential skew (typical) 0.1 ns channel-to-channel skew (typical) 2.5 ns maximum propagation delay 3.3V power supply design Flow-through pinout Power down high impedance on LVDS inputs Low Power design (18mW @ 3.3V static) Interoperable with existing 5V LVDS networks Accepts small swing (350 mV typical) differential signal levels Supports open, short and terminated input fail-safe Conforms to ANSI/TIA/EIA-644 Standard Ind.

Datasheet Details

Part number	DS90LV028A
Manufacturer	National Semiconductor
File Size	247.02 KB
Description	3V LVDS Dual CMOS Differential Line Receiver
Datasheet	DS90LV028A Datasheet
Additional preview pages of the DS90LV028A datasheet.

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DS90LV028A 3V LVDS Dual CMOS Differential Line Receiver June 1998 DS90LV028A 3V LVDS Dual CMOS Differential Line Receiver General Description The DS90LV028A is a dual CMOS differential line receiver designed for applications requiring ultra low power dissipation, low noise and high data rates. The device is designed to support data rates in excess of 400 Mbps (200 MHz) utilizing Low Voltage Differential Signaling (LVDS) technology. The DS90LV028A accepts low voltage (350 mV typical) differential input signals and translates them to 3V CMOS output levels. The receiver also supports open, shorted and terminated (100Ω) input fail-safe. The receiver output will be HIGH for all fail-safe conditions. The DS90LV028A has a flow-through design for easy PCB layout.

Published: Mar 30, 2005 |