DS90UR905Q Description
The DS90UR905Q/906Q chipset translates a parallel RGB Video Interface into a high-speed serialized interface over a single pair. This serial bus scheme greatly eases system design by eliminating skew problems between clock and data, reduces the number of connector pins, reduces the interconnect size, weight, and cost, and overall eases PCB layout. In addition, internal DC balanced decoding is used to support...
DS90UR905Q Key Features
- 65 MHz PCLK support (140 Mbps
- DS90UR905Q
- RGB888 + VS/HS/DE serialized to 1 pair FPD-Link II
- Randomizer/Scrambler
- DC-balanced data stream
- Selectable output VOD and adjustable de-emphasis DESERIALIZER
- DS90UR906Q
- FAST random data lock; no reference clock required
- Adjustable input receiver equalization
- LOCK (real time link status) reporting pin