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DS92LV1023 - 40-66 MHz 10 Bit Bus LVDS Serializer/Deserializer

General Description

The DS92LV1023 transforms a 10-bit wide parallel LVCMOS/LVTTL data bus into a single high speed Bus LVDS serial data stream with embedded clock.

The DS92LV1224 receives the Bus LVDS serial data stream and transforms it back into a 10-bit wide parallel data bus and recovers parallel clock.

Key Features

  • n Clock recovery from PLL lock to random data patterns. n Guaranteed transition every data transfer cycle n Chipset (Tx + Rx) power consumption < 500 mW (typ) @ 66 MHz n Single differential pair eliminates multi-channel skew n Flow-through pinout for easy PCB layout n 660 Mbps serial Bus LVDS data rate (at 66 MHz clock) n 10-bit parallel interface for 1 byte data plus 2 control bits n Synchronization mode and LOCK indicator n Programmable edge trigger on clock n High impedance on receiver inputs.

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DS92LV1023 and DS92LV1224 40-66 MHz 10 Bit Bus LVDS Serializer and Deserializer June 2002 DS92LV1023 and DS92LV1224 40-66 MHz 10 Bit Bus LVDS Serializer and Deserializer General Description The DS92LV1023 transforms a 10-bit wide parallel LVCMOS/LVTTL data bus into a single high speed Bus LVDS serial data stream with embedded clock. The DS92LV1224 receives the Bus LVDS serial data stream and transforms it back into a 10-bit wide parallel data bus and recovers parallel clock. The DS92LV1023 transmits data over backplanes or cable. The single differential pair data path makes PCB design easier. In addition, the reduced cable, PCB trace count, and connector size tremendously reduce cost.