DS92LV2411
Description
The DS92LV2411 (Serializer) / DS92LV2412 (Deserializer) chipset translates a parallel 24-bit LVCMOS data interface into a single high-speed CML serial interface with embedded clock information.
Key Features
- Supports Spread Spectrum Clocking (SSC) on inputs
- Data scrambler for reduced EMI
- DC-balance encoder for AC coupling
- Selectable output VOD and adjustable de-emphasis DESERIALIZER - DS92LV2412
- Random data lock; no reference clock required
- Adjustable input receiver equalization
- LOCK (real time link status) reporting pin
- Selectable Spread Spectrum Clock Generation (SSCG) and output slew rate control (OS) to reduce EMI
