FPD93140 Datasheet | National Semiconductor

Description The FPD93140 is a Low Power Gate Driver with Power Supply for Small Format LCD Displays. The FPD93140 and the panion FPD94128 (Controller / Column Driver with Integrated Frame Buffer) form a plete 2-chip solution for driving TFT LCD panels containing up to 176RGB X 240 pixels with versatile mounting and scan options. Its function is to drive the gates of the LCD active matrix displays and to generate all the supply voltages necessary for display operation. A shift register activates rows sequentially in programmable sequences based on the external clock. On chip charge pumps require a minimum number of external capacitores to generate all the necessary voltages to power the FPD94128 Column Driver and drive the LCD rows. Under mand from the FPD94128 series Column Driver, the FPD93140 can drive from 2 to 240 rows. This allows the use of various display sizes and Partial Display modes to reduce power consumption. Features n 241 Outputs Acmodates from 2 to 240 Rows with a dummy row n Bumped Flip Chip Packaging (45um Row Centers) n 4 Flexible mounting/scan options provide for symmetric display layout n Wide Supply input range of 2.85V to 5.5V for direct connection to Li-Ion battery n Low Power < 100µA IQ n High Efficiency (80%) n Onboard Charge Pump Power Supplies: j +9 to +18V @ 100µA j -6 to -12V @ 100µA or -9 to -18V @ 100µA n 3 to 6V @ 1m A Adjustable LCD Volatge n V driver and adjustable LCD Voltage n Optional "off-level" modulation in phase with V Block Diagrams Typical Application © 2003 National Semiconductor Corporation DS200730 .national. .. Block Diagrams (Continued) FPD93140 Block Diagram Functional Description Row Driver Row output voltages are generated by on chip charge pumps or can be provided externally. Level Shifters change low voltage shift register outputs into drive voltages. A precharge scheme reduces power dissipation while driving the gate line capacitance. Vertical Start (STV) is sampled on the...