GENERAL DESCRIPTION
Each port iv be read from or written to in a parallel (8-bit b ' (mode. To improve efficiency and simplify programrijing in control-based applications, a single bit of 1/0 II\' either port may be Set, cleared or read with a single rrilcTOprocessor instruction. ,ln addition to basic 1/0, one\of the ports, port A, may be programmed to operate!1 in several types of strobed mode with handshake. St(obed mode together with optional interrupt operation permit both high speed parallel data transfers and:, interface to a wide variety of peripherals with no external logic. The RAM 1/0 is an n-channe! silicon gate device packaged in a 40-pin dual-in-li". package. It operates ',y and is fully TTL ~th a single 5.volt power SUItP c<Jmpatible. ~rRIL 1118 z en CD CIl ~ .... Z ~ ~ FEATURES
0 0 0 0 0 0 ::r m . 128x8RAM Single +5-volt power s' plV Low power dissipatio .... CD 0 0 0 0 0 0 Fully static operation Completely TTL com Two 8-bit programma 1/0 port A has TRI-S ~ CD ibl~Î" ji...