GENERAL DESCRIPTION
Each of these parts function as a serial data input/output interface in a microcomputer system. The system software determines the functional configuration of the UART via a TRI-STATE® 8-bit bidirectional data bus. The UART performs serial-to-parallel conversion on data characters received from a peripheral device or a MODEM, and parallel-to-serial conversion on data characters re ceived from the CPU. The CPU can read the complete status of the UART. Status information reported includes the type and condition of the transfer operations being per formed by the UART, as well as any error conditions (parity, overrun, framing, or break interrupt). The UART includes a programmable baud rate generator that is capable of dividing the timing reference clock input by divisors of 1 to (216-1 ), and producing a 16 X clock for driving the internal transmitter logic. Provisions are also in cluded to use this 16 x clock to drive the receiver logic. The UART includes a complete MODEM-control capability and a processor-interrupt system.
National Semiconductor
