GENERAL DESCRIPTION
High efficiency is achieved by using synchronous rectification and pulse-skipping mode operation at light load. Inexpensive N-channel MOSFETs are used to reduce system cost. Bootstrap circuit is used to drive the high-side N-channel MOSFET. Current mode control scheme is used to improve line regulation and transient response, also provides cycle-by-cycle current limiting. The operating frequency is adjustable between 200 kHz and 400 kHz. An external shutdown pin can be used to disable the device and reduce the quiescent current to 0.1 µA. In low noise applications, bringing the FPWM pin high can force the device to operate in constant frequency mode. Other features include the external synchronization pin, and the PGOOD pin to indicate the state of the output voltage. Protection circuitry includes thermal shutdown, undervoltage and overvoltage shutdown protection, soft-start capability, and two levels of current limits: The first level simply limits the load current directly; at the second level, if the load pulls the output voltage down below 80% of the regulated value, the chip will shut down.
National Semiconductor
