LMH0071 Overview
The LMH0041 family of products provide a very simple 1:5 deserializer and receiver function. The device is intended to be paired with an FPGA host which will receive the raw 5 bit data words and will decode the data appropriately such that a SMPTE standard signal may be recovered. The devices are designed to receive data pliant with DVB-ASI, SMPTE 259M, SMPTE 292M and/or SMPTE 424M.
LMH0071 Key Features
- LVDS Interface Dual multiplexed inputs No external VCO or clock required Loopthrough with Cable Driver SMBus configurati
LMH0071 Applications
- SDI interfaces for
