Datasheet4U Logo Datasheet4U.com

LMH0341 - DVB-ASI SDI Deserializer

Download the LMH0341 datasheet PDF. This datasheet also covers the LMH0041 variant, as both devices belong to the same dvb-asi sdi deserializer family and are provided as variant models within a single manufacturer datasheet.

General Description

The LMH0041 family of products provide a very simple 1:5 deserializer and receiver function.

The device is intended to be paired with an FPGA host which will receive the raw 5 bit data words and will decode the data appropriately such that a SMPTE standard signal may be recovered.

Key Features

  • LVDS Interface Dual multiplexed inputs No external VCO or clock required Loopthrough with Cable Driver SMBus configuration interface 48 pin LLP package.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (LMH0041_NationalSemiconductor.pdf) that lists specifications for multiple related part numbers.

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
LMH0341, LMH0041, LMH0071, LMH0051 3G, HD, SD, DVB-ASI SDI Deserializer with Loopthrough and LVDS Interface ADVANCE INFORMATION April 2007 LMH0341, LMH0041, LMH0071, LMH0051 3G, HD, SD, DVB-ASI SDI Deserializer with Loopthrough and LVDS Interface General Description The LMH0041 family of products provide a very simple 1:5 deserializer and receiver function. The device is intended to be paired with an FPGA host which will receive the raw 5 bit data words and will decode the data appropriately such that a SMPTE standard signal may be recovered. The devices are designed to receive data compliant with DVB-ASI, SMPTE 259M, SMPTE 292M and/or SMPTE 424M. The interface between the LMH0041 and the FPGA consists of a 5 bit wide LVDS bus, an LVDS clock and an SMBus interface.