MM74C910 Datasheet | National Semiconductor

MM54C910 MM74C910 256 Bit TRI-STATE Random Access Read Write Memory September 1989 MM54C910 MM74C910 256 Bit TRI-STATE Random Access Read Write Memory General Description The MM54C910 MM74C910 is a 64 word by 4-bit random access memory Inputs consist of six address lines four data input lines a WE and a ME line The six address lines are internally decoded to select one of the 64 word locations An internal address register latches the address information on the positive to negative transition of ME The TRI-STATE outputs allow for easy memory expansion Address Operation Address inputs must be stable (t SA) prior to the positive to negative transition of ME and (t HA) after the positive to negative transition of ME The address register holds the information and stable address inputs are not needed at any other time Write Operation Data is written into memory at the selected address if WE goes low while ME is low WE must be held low for t WE and data must remain stable t HD after WE returns high Read Operation Data is nondestructively read from a memory location by an address operation with WE held high Outputs are in the TRI-STATE (Hi-Z) condition when the device is writing or disabled Features Y Y Y Y Y Supply voltage range High noise immunity TTL patible fan out Input address register Low power consumption Fast access time TRI-STATE outputs High voltage inputs 3 0V to 5 5V 0 45VCC (typ ) 1 TTL load 250 n W package (typ ) (chip enabled or disabled) 250 ns (typ ) at 5 0V Logic Diagrams .. Input Protection TL F 5914- 2 TRI-STATE is a registered trademark of National Semiconductor Corporation C1995 National Semiconductor Corporation w w w .d h s a t a ee . u t4 m o c TL F 5914- 1 TL F 5914 RRD-B30M105 Printed in U S...