GENERAL DESCRIPTION
n Optimized DRAM Controller (supports two banks, up to 8 Mbytes each) n Up to nine versatile, programmable chip selects n Up to eight external interrupts directly supported, and additional interrupt expansion through an external PIC interface n Glueless interface to ISA-type peripherals n Arbitration support for auxiliary processor n Support for External Bus Masters, allowing them to access DRAM and on-chip Peripherals n MICROWIRE™/Access.bus synchronous serial interfaces n UART with IrDA v1.0 (Infrared Data Association) port n Reconfigurable I/O: Up to 28 I/O pins can be used as general purpose bidirectional I/O lines n Flexible, programmable, multilevel power saving modes maximize power savings n Programming model compatible with the NS486SXF where possible FEATURES
n 100% compatible with VxWorks™, VRTX™, QNX™ Neutrino, pSOS + ® , and other popular real-time executives and operating system kernels n Intel486 instruction set compatible (protected mode only) with op...