GENERAL DESCRIPTION
2.2 PCI-to-ISA Bridge – PCI 2.1 compliant 33 MHz bus – Supports PCI initiator-to-ISA and ISA master-to-PCI cycle translations – Subtractive agent for unclaimed transactions (see the PROHIBIT signal description for exceptions) – Parallel to Serial IRQ conversion including IRQ3,4,5,6,7,9,10,11,12,14,15 – Supports 4 ISA slots directly without buffering – Programmable ISA clock (8.33 to 11 MHz) – Slow slew rate on edges 2.0 FEATURES
2.1 General – Functionally compatible with Intel 82380AB – 5.0 V tolerant PCI and ISA interfaces – Slave mode serialized IRQ support for both quiet and continuous modes – PC/PCI DMA support – 32-bit address decode for the 1MB BIOS ROM – Supports ISA bus mastering – 160-pin PQFP package 2.3 "PROHIBIT" functional support – Disables PCI bus subtractive decoding when PROHIBIT is asserted Block Diagram PCI Bus Serialized IRQ Interface PCI to X-Bus / X-Bus to PCI Bridge PC87200 Support PCI Configuration Registers Decoding logic X-Bus Arbiter PROHIB...
National Semiconductor
