SCAN921025 Overview
The SCAN921025 transforms a 10-bit wide parallel LVCMOS/LVTTL data bus into a single high speed Bus LVDS serial data stream with embedded clock. The SCAN921226 receives the Bus LVDS serial data stream and transforms it back into a 10-bit wide parallel data bus and recovers parallel clock. Both devices are pliant with IEEE 1149.1 Standard for Boundary Scan Test.
SCAN921025 Key Features
- IEEE 1149.1 (JTAG) pliant and At-Speed BIST test
- Clock recovery from PLL lock to random data patterns
- Guaranteed transition every data transfer cycle
- Chipset (Tx + Rx) power consumption < 600 mW (typ) @
- Single differential pair eliminates multi-channel skew
- 800 Mbps serial Bus LVDS data rate (at 80 MHz clock)
- 10-bit parallel interface for 1 byte data plus 2 control bits
- Synchronization mode and LOCK indicator
- Programmable edge trigger on clock
- High impedance on receiver inputs when power is off
