Datasheet4U Logo Datasheet4U.com

74F646B - Octal Transceiver Register

Download the 74F646B datasheet PDF. This datasheet also covers the 74F646 variant, as both devices belong to the same octal transceiver register family and are provided as variant models within a single manufacturer datasheet.

General Description

These devices consist of bus transceiver circuits with TRISTATE D-type flip-flops and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers Data on the A or B bus will be clocked into the registers as the appropriate clock pin goes

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (74F646_NationalSemiconductor.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number 74F646B
Manufacturer National
File Size 202.75 KB
Description Octal Transceiver Register
Datasheet download datasheet 74F646B Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
74F646B Octal Transceiver / Register Fairchild
74F646 Octal transceiver/register Philips
74F646 Octal Transceiver/Register Fairchild
74F646A Octal transceiver/register Philips
74F64 4-2-3-2-input AND-OR-invert gate Philips

Other Datasheets by National

Part Number Description
74F646 Octal Transceiver Register
74F64 4-2-3-2-Input AND-OR-Invert Gate
74F648 Octal Transceiver/Register
74F651 Transceivers/Registers
74F652 Transceivers/Registers

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
54F 74F646  74F646B  54F 74F648 Octal Transceiver Register with TRI-STATE Outputs December 1994 54F 74F646  74F646B  54F 74F648 Octal Transceiver Register with TRI-STATE Outputs General Description These devices consist of bus transceiver circuits with TRISTATE D-type flip-flops and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers Data on the A or B bus will be clocked into the registers as the appropriate clock pin goes to a high logic level Control G and direction pins are provided to control the transceiver function In the transceiver mode data present at the high impedance port may be stored in either the A or the B register or in both The select controls can multiplex stored and real-time (transparent mod