MM54C175 Datasheet PDF - National Quad D Flip-Flop Specs

MM54C175 - Quad D Flip-Flop

Datasheet Summary

Description

The MM54C175 MM74C175 consists of four positive-edge triggered D type flip-flops implemented with monolithic CMOS technology Both are true and complemented outputs from each flip-flop are externally available All four flipflops are controlled by a common clock and a common clear Information at the D

Features

Y Y Y Y Wide supply voltage range Guaranteed noise margin High noise immunity Low power TTL compatibility 3V to 15V 1 0V 0 45 VCC (typ ) Fan out of 2 driving 74L Connection Diagram Truth Table Dual-In-Line Package TL F 5900.
1 Top View Order Number MM54C175 or MM74C175 Each Flip-Flop Inputs Clear L H H H H Clock X D X H L X X Q L H L NC NC Outputs Q H L H NC NC u u H L H e High level L e Low level X e Irrelevant e Transition from low to high level NC e No change u C1995 Natio.

Datasheet Details

Part number	MM54C175
Manufacturer	National
File Size	114.01 KB
Description	Quad D Flip-Flop
Datasheet	MM54C175 Datasheet
Additional preview pages of the MM54C175 datasheet.

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Full PDF Text Transcription

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MM54C175 MM74C175 Quad D Flip-Flop February 1988 MM54C175 MM74C175 Quad D Flip-Flop General Description The MM54C175 MM74C175 consists of four positive-edge triggered D type flip-flops implemented with monolithic CMOS technology Both are true and complemented outputs from each flip-flop are externally available All four flipflops are controlled by a common clock and a common clear Information at the D inputs meeting the set-up time requirements is transferred to the Q outputs on the positivegoing edge of the clock pulse The clearing operation enabled by a negative pulse at Clear input clears all four Q outputs to logical ‘‘0’’ and Q’s to logical ‘‘1’’ All inputs are protected from static discharge by diode clamps to VCC and GND Features Y Y Y Y Wide supply voltage range Guaranteed nois

Published: May 7, 2005 |