MM54C175 Datasheet | National Semiconductor

Description The MM54C175 MM74C175 consists of four positive-edge triggered D type flip-flops implemented with monolithic CMOS technology Both are true and plemented outputs from each flip-flop are externally available All four flipflops are controlled by a mon clock and a mon clear Information at the D inputs meeting the set-up time requirements is transferred to the Q outputs on the positivegoing edge of the clock pulse The clearing operation enabled by a negative pulse at Clear input clears all four Q outputs to logical ‘‘0’’ and Q’s to logical ‘‘1’’ All inputs are protected from static discharge by diode clamps to VCC and GND Features Wide supply voltage range Guaranteed noise margin High noise immunity Low power TTL patibility 3V to 15V 1 0V 0 45 VCC (typ ) Fan out of 2 driving 74L Connection Diagram Truth Table Dual-In-Line Package TL F 5900 - 1 Top View Order Number MM54C175 or MM74C175 Each Flip-Flop Inputs Clear L H H H H Clock X D X H L X X Q L H L NC NC Outputs Q H L H NC NC u u H e High level L e Low level X e Irrelevant e Transition from low to high level NC e No change u C1995 National Semiconductor Corporation TL F 5900 RRD-B30M105 Printed in U S A Absolute Maximum Ratings (Note 1) If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications Voltage at Any Pin Operating Temperature Range MM54C175 MM74C175 b 0 3V to VCC a 0 3V b 55 C to a 125 C b 40 C to a 85 C Storage Temperature Range Power Dissipation (PD) Dual-In-Line Small Outline Operating VCC Range Absolute Maximum VCC Lead Temperature (Soldering 10 seconds) b 65 C to a 150 C 700 m W 500 m W 3V to 15V 18V 260 C DC Electrical Characteristics Min Symbol CMOS TO CMOS VIN(1) VIN(0) VOUT(1) VOUT(0) IIN(1) IIN(0) ICC Logical ‘‘1’’ Input Voltage Logical ‘‘0’’ Input Voltage Logical ‘‘1’’ Output Voltage Logical ‘‘0’’ Output Voltage Logical ‘‘1’’ Input Current Logical ‘‘0’’ Input...