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MM54C89 Datasheet 64-bit Tri-state Random ACcess Read/write Memory

Manufacturer: National

Overview: MM54C89 MM74C89 64-Bit TRI-STATE Random Access Read Write Memory March 1988 MM54C89 MM74C89 64-Bit TRI-STATE Random Access Read Write.

Datasheet Details

Part number MM54C89
Manufacturer National
File Size 130.18 KB
Description 64-Bit TRI-STATE Random Access Read/Write Memory
Datasheet MM54C89_NationalSemiconductor.pdf

General Description

The MM54C89 MM74C89 is a 16-word by 4-bit random access read write memory Inputs to the memory consist of four address lines four data input lines a write enable line and a memory enable line The four binary address inputs are decoded internally to select each of the 16 possible word locations An internal address register latches the address information on the positive to negative transition of the memory enable input The four TRI-STATE data output lines working in conjunction with the memory enable input provide for easy memory expansion Address Operation Address inputs must be stable tSA prior to the positive to negative transition of memory enable It is thus not necessary to hold address information stable for more than tHA after the memory is enabled (positive to negative transition of memory enable) Note The timing is different than the DM7489 in that a positive to negative transition of the memory enable must occur for the memory to be selected Read Operation The complement of the information which was written into the memory is non-destructively read out at the four outputs This is accomplished by selecting the desired address and bringing memory enable low and write enable high When the device is writing or disabled the output assumes a TRI-STATE (Hi-z) condition

Key Features

  • Y Y Y Y Y Y Y Wide supply voltage range 3 0V to 15V Guaranteed noise margin 1 0V High noise immunity 0 45 VCC (typ ) Low power fan out of 2 TTL compatibility driving 74L Low power consumption 100 nW package (typ ) Fast access time 130 ns (typ ) at VCC e 10V TRI-STATE output Write Operation Information present at the data inputs is written into the memory at the selected address by bringing write enable and memory enable low Logic and Connection Diagrams Dual-In-Line Package Top View TL F.

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