Employing complementary MOS (CMOS) transistors to achieve wide power supply operating range low power consumption and high noise margin these gates provide basic functions used in the implementation of digital integrated circuit systems The N- and P-channel enhancement mode transistors provide a sym
Features
Y Y Y Y
Y
Wide supply voltage range Guaranteed noise margin High noise immunity Low power TTL compatibility Low power consumption
3 0V to 15V 1 0V 0 45 VCC (typ ) Fan out of 2 driving 74L 10 nW package (typ )
Connection Diagram and Truth Table
Dual-In-Line Package
TL F 5878.
1
Top View Order Number MM54C08 or MM74C08
Inputs A L L H H
H e High Level
Outputs B L H L H
L e Low Level
Y L L L H
C1995 National Semiconductor Corporation
TL F 5878
RRD-B30M105 Printed in U S A
Absol.
MM54C08 MM74C08 Quad 2-Input AND Gate
February 1988
MM54C08 MM74C08 Quad 2-Input AND Gate
General Description
Employing complementary MOS (CMOS) transistors to achieve wide power supply operating range low power consumption and high noise margin these gates provide basic functions used in the implementation of digital integrated circuit systems The N- and P-channel enhancement mode transistors provide a symmetrical circuit with output swing essentially equal to the supply voltage No DC power other than that caused by leakage current is consumed during static condition All inputs are protected from damage due to static discharge by diode clamps to VCC and GND
Features
Y Y Y Y
Y
Wide supply voltage range Guaranteed noise margin High noise immunity Low power TTL compatibility Low power c
MM74C08 Datasheet
