TNT4882 Datasheet | National Semiconductor

Features 100-pin plastic quad flat pack (QFP), surfacemount package IEEE 488.1-patible transceivers on chip Fast data transfers - Up to 1.5 Mbytes/s using interlocked IEEE 488.1 handshake - Up to 8 Mbytes/s using HS488™ Two 8-bit 16-deep FIFOs buffer data between GPIB and CPU With exception of Controller, performs all IEEE 488 interface functions - SH1, AH1, T5 or TE5, L3 or LE3, SR1, RL1, PP1 or PP2, DC1, DT1, and C0 Meets all IEEE 488.2 requirements - Bus line monitoring - Preferred implementation of requesting service - Not sending messages when there are no Listeners Software patible with Turbo488 /NAT4882™ ASICs Reduces software overhead - Does not lose a data byte if ATN is asserted while transmitting data - Static interrupts status bits that do not clear when read ™ NEW! - Automatically transmits END or performs RFD holdoff on last byte of DMA transfer - Interrupts when handshake is plete on last byte of a DMA transfer - Has 32-bit counter for large, uninterrupted data transfers Programmable timer interrupt for general-purpose timing use plete in-system functional testing with internal loop-back mode ISA bus glue logic on chip Direct memory access (DMA) Device status indicator pins - My Address, Talk Addressed, Listen Addressed, REM, DCAS, TRIG Automatically processes IEEE 488 mands and reads undefined mands Handles 6 primary and secondary addressing modes Automatic EOS and/or NL message detection Programmable data transfer rate - TTL-patible CMOS device Description The TNT4882 provides a single-chip IEEE 488.2 Talker/Listener interface to the general-purpose interface bus (GPIB). The TNT4882 bines the circuitry of the NAT4882 IEEE 488.2 application-specific integrated circuit (ASIC), Turbo488 performance-enhancing ASIC, and GPIB transceivers to create a single-chip IEEE 488.2 interface. Because the TNT4882 contains the NAT4882 register set, which in turn has the NEC µPD7210 and TI TMS 9914A register sets, developers using any of these chips can easily port...