27C16 Datasheet | National Semiconductor

Description The 27C16 is a high speed 16K UV erasable and electrically reprogrammable CMOS EPROM ideally suited for applications where fast turnaround pattern experimentation and low power consumption are important requirements .. The 27C16 is packaged in a 24-pin dual-in-line package with transparent lid The transparent lid allows the user to expose the chip to ultraviolet light to erase the bit pattern A new pattern can then be written into the device by following the programming procedure This EPROM is fabricated with the reliable high volume time proven P2CMOSTM silicon gate technology The 27C16 specified on this data sheet is fully pliant with MIL-STD-883 Revision C Features Y Y Y Y Y Y Y Access time down to 450 ns Low CMOS power consumption Active Power 26 25 m W max Standby Power 0 53 m W max (98% savings) Performance patible to NSC800TM CMOS microprocessor Single 5V power supply Pin patible to MM2716 and higher density EPROMs Static no clocks required TTL patible inputs outputs TRI-STATE output Windowed DIP Package Specifications guaranteed over full military temperature range (b55 C to a 125 C) Block Diagram Pin Names A0 - A10 CE OE O0 - O7 PGM NC Addresses Chip Enable Output Enable Outputs Program No Connect TL D 10329 - 1 TRI-STATE is a registered trademark of National Semiconductor Corporation NS800TM are P2CMOSTM trademarks of National Semiconductor Corporation C1995 National Semiconductor Corporation TL D 10329 RRD-B30M105 Printed in U S A Connection Diagram 27C256 27256 VPP A12 A7 A6 A5 A4 A3 A2 A1 .. A0 O0 O1 O2 GND 27C128 27128 VPP A12 A7 A6 A5 A4 A3 A2 A1 A0 O0 O1 O2 GND 27C64 2764 VPP A12 A7 A6 A5 A4 A3 A2 A1 A0 O0 O1 O2 GND A7 A6 A5 A4 A3 A2 A1 A0 O0 O1 O2 GND TL D 10329 - 2 27C32 2732 Dual-In-Line Package 27C16Q 27C32 2732 27C64 2764 VCC PGM 27C128 27128 VCC PGM A13 A8 A9 A11 OE A10 CE O7 O6 O5 O4 O3 27256 27256 VCC A14 A13 A8 A9 A11 OE A10 CE O7 O6 O5 O4 O3 VCC A8 A9 A11 OE VPP A10 CE O7 O6 O5 O4 O3 Top View NC A8 A9 A11...