54155 Datasheet | National Semiconductor

Description These TTL circuits feature dual 1-line-to-4-line demultiplexers with individual strobes and mon binary-address inputs in a single 16-pin package When both sections are enabled by the strobes the mon address inputs sequentially select and route associated input data to the appropriate output of each section The individual strobes permit activating or inhibiting each of the 4-bit sections as desired Data applied to input C1 is inverted at its outputs and data applied at C2 is true through its outputs The inverter following the C1 data input permits use as a 3-to-8-line decoder or 1-to-8-line demultiplexer without external gating Input clamping diodes are provided on these circuits to minimize transmission-line effects and simplify system design Features Y Applications Dual 2-to-4-line decoder Dual 1-to-4-line demultiplexer 3-to-8-line decoder 1-to-8-line demultiplexer Y Individual strobes simplify cascading for decoding or demultiplexing larger words Y Input clamping diodes simplify system design Connection Diagram and Function Tables Dual-In-Line Package Select XX LL LH HL HH XX 2-Line-to-4-Line Decoder or 1-Line-to-4-Line Demultiplexer Inputs Outputs Strobe Data G1 C1 1Y0 1Y1 1Y2 H X HHH L H LHH L H HLH L H HHL L H HHH X L HHH 1Y3 H H H H L H TL F 6549 - 1 Order Number DM54155J DM54155W or DM74155N See NS Package Number J16A N16A or W16A Inputs Outputs Select Strobe Data B A G2 C2 2Y0 2Y1 2Y2 2Y3 XX LL LH HL HH XX H L L L L X X HHHH L LHHH L HLHH L HHLH L HHHL H HHHH C e inputs C1 and C2 connected together G e inputs G1 and G2 connected together H e high level L e low level X e don’t care 3-Line-to-8-Line Decoder or 1-Line-to-8-Line Demultiplexer Inputs Outputs Select Strobe Or Data (0) (1) (2)...