54ACT821 Datasheet | National Semiconductor

Description The ’AC/’ACT821 is a 10-bit D flip-flop with TRI-STATE outputs arranged in a broadside pinout. The ’AC/’ACT821 is functionally identical to the AM29821. n n n n Noninverting outputs Outputs source/sink 24 m A ’ACT821 has TTL-patible inputs Standard Microcircuit Drawing (SMD) - ’ACT821: 5962-88705 - ’AC821: 5962-91606 Features n TRI-STATE outputs for bus interfacing Logic Symbols Connection Diagrams Pin Assignment for DIP and Flatpak DS100355-1 IEEE/IEC DS100355-3 Pin Assignment for LCC DS100355-2 Pin Names D0- D9 O0- O9 OE CP Description Data Inputs Data Outputs Output Enable Input Clock Input DS100355-4 TRI-STATE ® is a registered trademark of National Semiconductor Corporation. FACT ® is a registered trademark of Fairchild Semiconductor Corporation. © 1998 National Semiconductor Corporation DS100355 .national. Functional Description The ’AC/’ACT821 consists of ten D-type edge-triggered flip-flops. The buffered Clock (CP) and buffered Output Enable (OE) are mon to all flip-flops. The flip-flops will store the state of their individual D inputs that meet the setup and hold time requirements on the LOW-to-HIGH CP transition. With OE LOW the contents of the flip-flops are available at the outputs. When OE is HIGH the outputs go to the high impedance state. Operation of the OE input does not affect the state of the flip-flops. The ’AC/’ACT821 is functionally and pin patible with the AM29821. Function Table Inputs OE H H L L CP Internal D L H L H Q L H L H Outputs O Z Z L H Function High Z High Z Load Load H = HIGH Voltage Level L = LOW Voltage Level Z = HIGH Impedance N = LOW-to-HIGH Clock Transition Logic Diagram DS100355-5 Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. .national. Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/...