54F540 Datasheet | National Semiconductor

Description The ’F540 and ’F541 are similar in function to the ’F240 and ’F244 respectively except that the inputs and outputs are on opposite sides of the package (see Connection Diagrams) This pinout arrangement makes these devices especially useful as output ports for microprocessors allowing ease of layout and greater PC board density Features TRI-STATE outputs drive bus lines Inputs and outputs opposite side of package allowing easier interface to microprocessors mercial 74F540PC Military Package Number N20A Package Description 20-Lead (0 300 Wide) Molded Dual-In-Line 20-Lead Ceramic Dual-In-Line 20-Lead (0 300 Wide) Molded Small Outline JEDEC 20-Lead (0 300 Wide) Molded Small Outline EIAJ 20-Lead Cerpack 20-Lead Ceramic Leadless Chip Carrier Type C 20-Lead (0 300 Wide) Molded Dual-In-Line 20-Lead Ceramic Dual-In-Line 20-Lead (0 300 Wide) Molded Small Outline JEDEC 20-Lead (0 300 Wide) Molded Small Outline EIAJ 20-Lead Cerpack 20-Lead Ceramic Leadless Chip Carrier Type C 54F540DM (Note 2) 74F540SC (Note 1) 74F540SJ (Note 1) 54F540FM (Note 2) 54F540LM (Note 2) 74F541PC 54F541DM (Note 2) 74F541SC (Note 1) 74F541SJ (Note 1) 54F541FM (Note 2) 54F541LM (Note 2) J20A M20B M20D W20A E20A N20A J20A M20B M20D W20A E20A Note 1 Devices also available in 13 reel Use suffix e SCX and SJX Note 2 Military grade device with environmental and burn-in processing Use suffix e DMQB FMQB and LMQB Connection Diagrams Pin Assignment for DIP SOIC and Flatpak ’F540 Pin Assignment for LCC TL F 9553 - 2 TL F 9553 - 1 TRI-STATE is a registered trademark of National Semiconductor Corporation C1995 National Semiconductor Corporation TL F 9553 RRD-B30M75 Printed in U S A Connection Diagrams (Continued) ’F541 TL F 9553 - 5 TL F 9553- 4 Unit Loading Fan Out 54F 74F Pin Names Description UL HIGH LOW 10 10 10 10 600 106 6 (80) Input IIH IIL Output IOH IOL 20 m A b0 6 m A 20 m A b0 6 m A b 12 m A 64 m A (48 m A) OE1 OE2 In On On TRI-STATE Output Enable Input (Active LOW) Inputs...